India - Flag India

Please confirm your currency selection:

Indian Rupee
Incoterms:FCA (Shipping Point)
Duty, customs fees and taxes are collected at time of delivery.
Payment accepted in Credit cards only

US Dollars
Incoterms:FCA (Shipping Point)
Duty, customs fees and taxes are collected at time of delivery.
All payment options available

Bench Talk for Design Engineers

Bench Talk

rss

Bench Talk for Design Engineers | The Official Blog of Mouser Electronics


Flash Storage Configurations: NOR and NAND Paul Pickering

(Source: vectorfusionart/Shutterstock.com)

Mouser reviewed and updated the blog in March 2021.

Plugin solid-state memory devices are based on flash memory technology invented by Toshiba's Fujio Masuoka (1943-) in 1980. A flash memory device consists internally of large arrays of floating-gate metal-oxide semiconductor field-effect transistors (MOSFETs). It comes in two (2) configurations (Figure 1):

  • NOR (Not OR)
  • NAND (Not AND)

Figure 1: NOR and NAND flash logic diagrams. (Source: John Orsbun/Shutterstock.com)

NOR-based flash has fast-read access times and high endurance. Because it allows random access to any memory location, it is used mostly for reliable code storage in ROM-replacement BIOS or firmware applications. NOR devices are available up to 2GB, with either a serial or parallel interface.

NAND flash requires less chip area per cell, allowing greater storage density and lower cost per bit than NOR flash. NAND devices are available up to 2Tb. The disadvantage of NAND flash is that individual cells can’t be written or erased; these operations must be done in blocks of cells, making NAND more suitable for data-heavy applications. The write operation slowly degrades the NAND cell; most NAND drives wear out after a few thousand write cycles, whereas read operations can extend to millions of cycles. This limitation still gives a typical lifetime of several years under normal operation.

The process geometries for NAND flash are as small as 25nm. There are three (3) different types of technologies: Single-Level Cell (SLC), Multi-Level Cell (MLC), and Triple-Level Cell (TLC), which can store one, two, or three bits per memory cell, respectively. As the bits per cell increase, the cost decreases, but the performance and endurance degrade. Higher-performance products, therefore, tend to use SLC and MLC devices, while consumer-grade devices are moving to TLC technology.

For more information about flash storage, visit Mouser’s Flash Memory site.



« Back


Paul PickeringAs a freelance technical writer, Paul Pickering has written on a wide range of topics including: semiconductor components & technology, passives, packaging, power electronic systems, automotive electronics, IoT, embedded software, EMC, and alternative energy. Paul has over 35 years of engineering and marketing experience in the electronics industry, including time spent in automotive electronics, precision analog, power semiconductors, embedded systems, logic devices, flight simulation and robotics. He has hands-on experience in both digital and analog circuit design, embedded software, and Web technologies. Originally from the North-East of England, he has lived and worked in Europe, the US, and Japan. He has a B.Sc. (Hons) in Physics & Electronics from Royal Holloway College, University of London, and has done graduate work at Tulsa University.


All Authors

Show More Show More
View Blogs by Date