LMK1D1216RGZT

Texas Instruments
595-LMK1D1216RGZT
LMK1D1216RGZT

Mfr.:

Description:
Clock Buffer 16-channel output 1. 8-V 2.5-V and 3.3- LMK1D1216RGZR

Datasheet:
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In Stock: 45

Stock:
45
Can Dispatch Immediately
On Order:
250
Expected 03-06-2026
Factory Lead Time:
6
Weeks Estimated factory production time for quantities greater than shown.
Long lead time reported on this product.
Minimum: 1   Multiples: 1
Unit Price:
₹-.--
Ext. Price:
₹-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 250)

Pricing (INR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
₹2,104.00 ₹2,104.00
₹1,683.76 ₹16,837.60
₹1,579.40 ₹39,485.00
₹1,475.97 ₹1,47,597.00
Full Reel (Order in multiples of 250)
₹1,372.54 ₹3,43,135.00
1,000 Quote
† A MouseReel™ fee of ₹475.00 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Clock Buffer
RoHS:  
16 Output
2 GHz
575 ps
LVDS
VQFN-48
HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL
2 GHz
1.71 V
3.465 V
LMK1D1216
- 40 C
+ 105 C
Brand: Texas Instruments
Development Kit: LMK1D1216EVM
Duty Cycle - Max: 55 %
Moisture Sensitive: Yes
Mounting Style: SMD/SMT
Operating Supply Current: 70 mA
Packaging: Reel
Packaging: Cut Tape
Packaging: MouseReel
Product: Clock Buffers
Product Type: Clock Buffers
Factory Pack Quantity: 250
Subcategory: Clock & Timer ICs
Type: LVDS Buffer
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Attributes selected: 0

Datasheet

PCN

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Compliance Codes
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
MXHTS:
8542399999
ECCN:
EAR99
Origin Classifications
Country of Origin:
China
Assembly Country of Origin:
China
Country of Diffusion:
Germany
The country is subject to change at the time of shipment.

LMK1D121x Low Additive Jitter LVDS Clock Buffer

Texas Instruments LMK1D121x Low Additive Jitter LVDS Clock Buffer is specifically designed for driving 50Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin. The LMK1D1212 distributes with minimum skew one of two selectable clock inputs (IN0 and IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can accept two clock sources into an input multiplexer. The inputs can be LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS.

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