SN74AHCT139N

Texas Instruments
595-SN74AHCT139N
SN74AHCT139N

Mfr.:

Description:
Encoders, Decoders, Multiplexers & Demultiplexers Dual

ECAD Model:
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In Stock: 2,579

Stock:
2,579 Can Dispatch Immediately
Factory Lead Time:
12 Weeks Estimated factory production time for quantities greater than shown.
Long lead time reported on this product.
Minimum: 1   Multiples: 1
Unit Price:
₹-.--
Ext. Price:
₹-.--
Est. Tariff:

Pricing (INR)

Qty. Unit Price
Ext. Price
₹82.93 ₹82.93
₹59.73 ₹597.30
₹53.76 ₹1,344.00
₹47.24 ₹4,724.00
₹44.17 ₹11,042.50
₹42.30 ₹21,150.00
₹41.28 ₹1,03,200.00
₹38.20 ₹1,91,000.00

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Encoders, Decoders, Multiplexers & Demultiplexers
RoHS:  
Decoders / Demultiplexers
AHCT
2 Input
4 Output
PDIP-16
8.5 ns
4.5 V
5.5 V
Through Hole
- 40 C
+ 85 C
Tube
Brand: Texas Instruments
Logic Type: Decoders/Demultiplexers
Number of Circuits: 2 Circuit
Product Type: Encoders, Decoders, Multiplexers & Demultiplexers
Series: SN74AHCT139
Factory Pack Quantity: 25
Subcategory: Logic ICs
Unit Weight: 1 g
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Attributes selected: 0

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Compliance Codes
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
8542390990
TARIC:
8542319000
MXHTS:
8542310399
ECCN:
EAR99
Origin Classifications
Country of Origin:
Mexico
Assembly Country of Origin:
Not available
Country of Diffusion:
Not available
The country is subject to change at the time of shipment.

SN74AHCT139/SN74AHCT139-Q1 Decoders/Demultiplexers

Texas Instruments SN74AHCT139/SN74AHCT139-Q1 2-to-4-Line Decoders/Demultiplexers are designed for 4.5V to 5.5V VCC operation. These devices are intended for high-performance data routing or memory decoding applications requiring very short propagation delay times. These decoders can be used to minimize the effects of system decoding in high-performance memory systems. When used with high-speed memories utilizing a fast enable circuit, the enable time of the memory and the delay times of these decoders are usually less than the typical access time. This reduction means that the effective system delay introduced by the decoders is negligible.