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SN74LVCH32373ANMJR

Name: Texas Instruments SN74LVCH32373ANMJR
Brand: Texas Instruments
SKU: 595-74LVCH32373ANMJR
Price: 739.38 INR
Availability: InStock

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Mouser No:

595-74LVCH32373ANMJR

Mfr. No:

SN74LVCH32373ANMJR

Mfr.:

Texas Instruments

Description:

Latches 32-bit transparent D -type latch with 3-

Datasheet:

SN74LVCH32373ANMJR Datasheet

ECAD Model:

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More Information

Learn more about Texas Instruments SN74LVCH32373ANMJR

In Stock: 2,781

Stock:: 2,781 Can Dispatch Immediately

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Factory Lead Time:: 12 Weeks Estimated factory production time for quantities greater than shown.

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Minimum: 1 Multiples: 1

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Ext. Price:

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Packaging:

Full Reel (Order in multiples of 1000)

Cut Tape

MouseReel™ (+₹475.00)

Pricing (INR)

Qty.	Unit Price	Ext. Price
Cut Tape / MouseReel™ ^†
	₹739.38	₹739.38
	₹573.18	₹5,731.80
	₹531.85	₹13,296.25
	₹488.73	₹48,873.00
	₹481.54	₹1,20,385.00
	₹477.95	₹2,38,975.00
Full Reel (Order in multiples of 1000)
	₹439.32	₹4,39,320.00
5,000	Quote

† A MouseReel™ fee of ₹475.00 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Latches
RoHS:
Logic Family:	LVCH
Package/Case:	NFBGA-96
Packaging:	Reel
Packaging:	Cut Tape
Packaging:	MouseReel
Brand:	Texas Instruments
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	Latches
Series:	SN74LVCH32373A
Factory Pack Quantity:	1000
Subcategory:	Logic ICs

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Datasheet

SN74LVCH32373ANMJR Datasheet

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CNHTS:: 8542399000
USHTS:: 8542390090
TARIC:: 8542319000
ECCN:: EAR99

SN74LVCH32373A 32-Bit Transparent D-Type Latch

Texas Instruments SN74LVCH32373A 32-Bit Transparent D-Type Latch is designed for 1.65V to 3.6V supply voltage range (VCC) operation. The Texas Instruments SN74LVCH32373A is suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as four 8-bit latches, two 16-bit latches, or one 32-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.