ispPAC-POWR605-01SN24I

Lattice
842-POWR605-01SN241
ispPAC-POWR605-01SN24I

Mfr.:

Description:
Supervisory Circuits PROCESSORPM 6-SUPPLY SUPERVISOR RESET GEN

ECAD Model:
Download the free Library Loader to convert this file for your ECAD Tool. Learn more about the ECAD Model.

In Stock: 759

Stock:
759 Can Dispatch Immediately
Factory Lead Time:
20 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
₹-.--
Ext. Price:
₹-.--
Est. Tariff:

Pricing (INR)

Qty. Unit Price
Ext. Price
₹350.38 ₹350.38
₹305.46 ₹7,636.50
₹291.98 ₹29,198.00

Product Attribute Attribute Value Select Attribute
Lattice
Product Category: Supervisory Circuits
RoHS:  
Voltage Supervisory
SMD/SMT
QFN-24
2.5 V
6 Input
Open Drain
Manual Reset
Watchdog
No Backup
100 us
3.96 V
- 40 C
+ 105 C
0.8 %
Tray
Brand: Lattice
Moisture Sensitive: Yes
Operating Supply Current: 3.5 mA
Power Fail Detection: Yes
Product Type: Supervisory Circuits
Factory Pack Quantity: 560
Subcategory: PMIC - Power Management ICs
Supply Voltage - Min: 2.64 V
Tradename: ispPAC
Unit Weight: 1 g
Products found:
To show similar products, select at least one checkbox
Select at least one checkbox above to show similar products in this category.
Attributes selected: 0

This functionality requires JavaScript to be enabled.

CNHTS:
8542311999
CAHTS:
8542310000
USHTS:
8542390090
KRHTS:
8542311000
TARIC:
8542319000
MXHTS:
8542399999
ECCN:
3A991.d

ProcessorPM™ POWR605 PLD

Lattice ProcessorPM™ POWR605 16-Macrocell Programmable Logic Device (PLD) integrates reset generator ICs, voltage supervisor ICs, and watchdog timer ICs on one device. The ProcessorPM POWR605 features six precision programmable threshold monitors that can be configured to monitor any supply rail from 0.67V to 5.7V and a 16-Macrocell PLD that can be used for generating reset signals and brown-out signals. These ProcessorPM POWR605 PLD also includes four timers for reset pulse stretching, de-bouncing reset switches, and implementing watchdog timers. This 16-Macrocell PLD can be programmed in-system through JTAG, and the configuration is stored in the on-chip non-volatile E2CMOS® memory. The ispPAC®-POWR607 is an evaluation kit that demonstrates the functions of the POWR605 PLD.

FEATURED PRODUCTS
LATTICE