
Intel Cyclone 10 FPGAs
Intel® Cyclone® 10 FPGAs deliver cost and power savings over previous generations of Cyclone FPGAs. Intel Cyclone 10 GX devices provide high bandwidth via 10.3Gbps transceiver-based functions, 1833Mbps DDR3, and 1.4Gbps LVDS I/O. Cyclone 10 LP devices offer low-power cost-optimized functions suitable for general-purpose board control, chip-to-chip bridging, or motor/motion control.
• Cyclone 10 GX - optimized for high bandwidth performance applications like Industrial Vision, Robotics, and Automotive Infotainment.
• Cyclone 10 LP - optimized for low-power, low-cost applications like I/O expansion, sensor fusion, motor/motion control, chip-to-chip bridging, and board management control.
Cyclone 10 GX and LP support vertical migration. Designs can be started with one device and migrated to adjacent densities at a later date as designs are finalized.
Features
- Intel Cyclone 10 LP features
- Low-cost, low-power FPGA fabric
- 1.0V and 1.2V core voltage options
- Available in commercial, industrial, and automotive temperature grades
- Several package types and footprints:
- FineLine BGA (FBGA)
- Enhanced Thin Quad Flat Pack (EQFP)
- Ultra FineLine BGA (UBGA)
- Micro FineLine BGA (MBGA)
- Multiple device densities with pin migration capability
- RoHS6 compliance
- Logic elements — four-input look-up table (LUT) and register
- Abundant routing/metal interconnect between all LEs
- M9K — 9 kilobits (Kb) of embedded SRAM memory blocks, cascadable
- Intel Cyclone 10 GX features
- Built on TSMC's 20nm process technology
- Twice higher performance than the previous generation of low-cost FPGAs
- Short-reach rates up to 10.3125 Gigabits per second (Gbps)
- Hard PCI Express IP blocks supporting Gen2 ×4 applications
- 8-input adaptive logic module (ALM)
- Up to 11.74 megabits (Mb) of embedded memory
- Variable-precision digital signal processing (DSP) blocks
- Fractional synthesis phase-locked loops (PLLs)
- Hard memory controllers and PHY up to 1,866 Megabits per second (Mbps)
- Comprehensive set of advanced power-saving features
- Power-optimized MultiTrack routing and core architecture
Applications
- Intel Cyclone 10 LP applications
- I/O expansion
- Interfacing
- Bridging
- Sensor fusion
- Industrial motor control
- Intel Cyclone 10 GX applications
- Automotive Infotainment
- Smart Vision Cameras
- Industrial Robotics
- Machine Vision
- Industrial Programmable Logic Controllers
- Pro-AV Systems
Cyclone 10 LP
Half the Power at Half the Cost*
The Intel Cyclone 10 LP FPGA family extends the Cyclone FPGA series low cost and power leadership. Ideal for high-volume, cost-sensitive functions, Cyclone 10 LP FPGAs are designed for a broad spectrum of general logic applications.
Reduce Power Consumption
Built on a power-optimized 60nm process, Cyclone 10 LP FPGAs extend the low-power leadership of the previous generation Cyclone V FPGAs. The devices reduce core static power by up to 50 percent compared to the previous generations.
Lower Your System Costs
All Cyclone 10 LP FPGAs require only two core power supplies for operation, simplifying your power distribution network and saving board costs, space, and design time. The flexibility of the Cyclone 10 LP FPGA enables smaller, lower-cost device design, lowering total system costs.
Additional Resources
Cyclone 10 LP Datasheet
Cyclone 10 LP Overview Table
*Compared to previous generation Cyclone FPGAs, cost comparisons are based on list price. Tests measure the performance of components on a particular test in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance.
Cyclone® 10 GX
2X Higher Performance for Up to Half the Cost*
Intel Cyclone 10 GX FPGAs are the first low-cost devices built on a high-performance 20nm process, offering a performance advantage for cost-sensitive applications.
• The industry's first low-cost FPGA with 10.3Gbps transceiver I/O support
• High performance 1,866Mbps external memory interface
• 1.434Gbps LVDS I/O
• The industry's first low-cost FPGA with IEEE 754-compliant hard floating-point DSP blocks
Increase Productivity, Integration, and Decrease Time to Market
• State-of-the-art compile times for 20nm devices combined with an advanced design environment for low-cost FPGAs
• Support for advanced features like partial reconfiguration and single event upset (correction and detection) as standard features
• Short compile times enable faster design iterations and faster timing closure
• C-based design entry using the Intel FPGA SDK for OpenCL™, offering a design environment that is easy to implement on FPGAs
• System-level design environment with Qsys system integration tool
• DSP Builder for Intel FPGAs – Model-based DSP environment within the MATLAB/Simulink environment
• Intel Enpirion® PowerSoCs offer customers a small footprint, high performance, low system power, high reliability and efficiency, and faster time to market to power Cyclone 10 FPGAs
Additional Resources
Device Overview
Cyclone 10 GX Datasheet
Cyclone 10 GX Overview Table
Block Diagram
