Microsemi / Microchip ZL30256 General Purpose Jitter Attenuator
Microsemi / Microchip ZL30256 General Purpose Jitter Attenuator is a multi-channel high-performance, any-rate multiplier and jitter attenuator. The device simplifies board design by generating ultra-low-jitter clock signals from or attenuating clock signals while generating additional independent frequency families. With 3 independent jitters attenuating DPLL channels, it provides the ability to create 5 different frequency families. The Microsemi / Microchip ZL30256 offers best-in-class jitter performance and can create complete clock trees. This feature improves design reliability, reduces the bill of materials (BOM) cost, and simplifies the design by replacing multiple PLLs and peripheral timing components.
Features
- Up to 3 independent DPLL channels
- Excellent jitter performance of 180fs RMS in 12kHz to 20MHz band meets jitter requirements of 10G/40G and 100G PHYs
- Two programmable ultra-low jitter synthesizers generate any frequency from 1Hz to 1045MHz
- One programmable general-purpose synthesizer generates any clock from 1Hz to 180MHz
- 8 differential or 16 single-ended (CMOS) ultra-low jitter outputs plus two general-purpose CMOS outputs
- Any input reference can be fed with clock, sync (frame pulse), clock /sync pair or clock modulated with sync pulse (embedded PPS ePPS and embedded PP2S ePP2S)
- Accepts up to 10 LVPECL/LVDS/HCSL/LVCMOS inputs
- Up to four programmable digital PLLs/NCOs with loop bandwidth from 14Hz to 470Hz synchronize to any clock rate from 1kHz to 900MHz and to clock plus sync pulse
- Automatic hitless reference switching and digital holdover on reference fail with initial holdover accuracy better than 1ppb with post holdover filter
- Easy Configuration and dynamic programming via SPI/I2C interface
- Operates from a single crystal resonator or clock oscillator
Block Diagram
Published: 2019-11-06
| Updated: 2023-06-20