Recently, I was given a project that would require me to transition from MCU to FPGA development. In this four-part blog series, I examine how I translated my existing knowledge and experience with MCUs into FPGA development. In Part 1, I examined some advantages and disadvantages of FPGAs, introduced the Terasic DE10 Nano development kit, and explored a few key FPGA planning considerations. Now in Part 2, I explore example code and discover additional useful resources.
The differences between MCU and FPGA are a bit like the differences between a scooter and a car: While both will get you from Point A to Point B, the mechanics are fundamentally different. I thought this analogy was a good in describing the pin mode, pin types, and parallel vs. serial processing, which are quite different in FPGA as compared to MCU.
At first, I started with the Terasic setup and guided practice, but I kept getting stuck. Every time, the compiling process ended with an error. Intent on not giving up, I got another cup of coffee and began going through the Intel Developer Zone website, which offered simpler examples. I was amazed at the reduction in complexity! Here, the examples were easy enough to follow—they even compiled and worked. Once I understood the basics, working through the Terasic examples was much easier. I think this was partly because the compilers were set up and partly because I had more familiarity with them.
The Terasic DE10-Nano combines an MCU—i.e., the hard processor system (HPS)— with an FPGA, so I decided to get started in familiar territory—the MCU. The Arm (“my first HPS”) development felt familiar and simple; it felt unencumbered in the Eclipse IDE; and the Intel SoC development tool helped to make programming the system a breeze. I went a little beyond the “Hello World” example and added another line, which would do nothing more than test run to the capabilities of the compiler—thankfully, I didn’t end up with a compiler fail. The IDE was brilliant and felt very like most HPS IDEs I had dealt with in the past.
Eventually, I had to move on to the FPGA portion, where the fundamental difference is that I can do a lot of things simultaneously (or in parallel), contrary to an MCU’s usually-serial fashion. Adapting to this concept felt a bit more complex and much slower; however, considering that the concept was new, it was not overly difficult. The Intel Developer Zone version was definitely the best set of guides to start with, owing to the prebuilt configuration and guided installation.
The Intel Developer Zone Installation file gets the basics started, then Terasic builds on those new skills adding additional functions and a complete process—rather than a hunt-and-peck, copy-and-paste method of learning. Intel truly introduces what I believe to be the necessary knowledge base for building my own application in the near future, including building block diagrams, timing profiles, and I/O programming. Block diagrams provide clear visual flow during very complex program developments. Timing profiles handle serial versus parallel protocols and bus timing protocols referenced.
Any pin can do anything, which is probably the most well-known feature of the FPGA. (Programming pins was a trip!) The pin allocation manager was really cool, but the table lookup was daunting. Thankfully, in the newest version of Quartus, Terasic has provided a complete map to all the ports and pinouts, using a well-documented naming schema. This makes the coding portion much easier.
Working in a new development environment was uncomfortable. The new process and keyboard shortcuts required an adjustment, and, of course, there were the “usual” setup issues that come with setting up a new IDE. However, the documentation was clear, and the images helped a lot. Intel has even expanded its capabilities to create a Linux setup and a Windows setup, providing Linux emulation for programming, which greatly simplifies the initial process. However, I still had problems with setting up Linux and gave up on my attempt at a self-compiled Linux IDE. Later, I did find a 120-page guide to properly set it up. Go figure!
I enjoyed this exercise, and I feel confident about going forward. However, this phase was very heavy in downloads, configuration, and figuring out what to do next. I’m stoked about the next phase. I plan on introducing different hardware, developing my own software using the example code, and taking advantage of the HPS and FPGA technology. My plan is to run OpenCV software with HPS (using external hardware) and accelerate the video processing with the FPGA portion.
Stay tuned for Part 3! Meanwhile, if you’re an MCU developer making the transition to FPGA, share your experiences, tips, and advice in the Comments!
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